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Here we discuss the wafer-scale fabrication process flow of aluminium airbridges for microwave (MW) interconnects on lithium niobate on Damascene silicon nitride (LNOD) photonic chips. We also discuss the subsequent chip release procedure that preserves the bridges allowing for safe release of these delicate structures.

Here I explain the KOH simulator software (ACES) from University of Chicago [1] for a chain process of DRIE followed by KOH undercut. This software is very simple yet power to understand how Si etching works and design the mask to optimize the etch speed and crystal planes [2].

We highlight some stability issues in high-surface-area and high-aspect ratio gold nanostructures fabricated using inorganic adhesion layers on silica substrates. We ascribe these problems to capillary and surface effects and show the use of organic silane self-assembled monolayers to improve the long-term stability of such structures.

Resist removal is an essential step for multi-layer lithography processes where a clean and contamination-free surface is essential to avoid shadow etching patterns from resist leftovers. We show that a short \mathrm{O_2} plasma exposure followed by a full NMP solution cycle removes the resist fully and leaves the surface contamination free.

In this report I monitor a full successful cycle of critical point drying (CPD) run for drying MEMS sensors after wet release using KOH etching. The pressure and temperature of the CPD tool (Tousimis) is monitored during the process and plotted in a P-T diagram with \mathrm{CO_2} critical point. A few notes for higher yield in the drying process are mentioned in this report as well.